CoreFFT Fast Fourier Transform
samples picked from the memory. Precautions must be
taken to ensure that there are no data overflows.
To avoid risk of overflow, one of three methods can be
employed:
? Input data scaling
? Unconditional block floating-point scaling
shows the total number of bits the data loses because of
bit shifting in the FFT calculation.
log 2 N – 1 bits
EQ 6
Unconditional block floating-point scaling results in the
same number of bits lost as in input data scaling.
?
Conditional block floating-point scaling
However, it produces more precise results, as the FFT
One way to ensure that overflow never occurs is to
include enough extra sign bits, called guard bits, in the
FFT input data. Data can grow by a maximum factor of
2.4 from butterfly input to output (two bits of growth).
However, it is not possible for the data value to grow by
this maximum amount in two consecutive stages.
The number of guard bits necessary to compensate for
the maximum possible bit growth for an N-point FFT is
log 2 N + 1
EQ 5
For example, each of the input samples of a 256-point
FFT should contain nine guard bits, leaving only seven
bits for actual data. Obviously, the data bit resolution is
greatly limited when using the input data scaling
technique.
Another way to compensate for bit growth is to scale the
butterfly outputs down by a factor of two after each
stage. Consequently, the final FFT results are scaled down
by a factor of 1 / N. This approach is called unconditional
block floating-point scaling. Initially, two guard bits are
included in the input data to accommodate the
maximum bit growth at the very first stage. In each
successive butterfly calculation, the data can grow into
these guard bits. To prevent overflow in successive
stages, the guard bits are replaced before the next stage
is executed by shifting the entire block of data (all results
of the current stage) one bit to the right. The input data
of an unconditional block floating-point FFT can have at
most 14 bits (1 sign bit and 13 magnitude bits). EQ 6
Table 5 ? Core Generator Parameters
Parameter
engine starts with more precise input data.
In conditional block floating-point scaling, data is shifted
only if bit growth actually occurs. If one or more
butterfly outputs grow, the entire block of data is shifted
to the right. The conditional block floating-point
monitor checks every butterfly output for growth. If
shifting is necessary, it is performed after the entire stage
is complete (at the input of the next stage butterfly). This
technique provides the least amount of distortion (noise)
caused by finite word length.
The CoreFFT module is configured to apply conditional
block floating-point scaling by default. In this mode, the
input data is checked as well and, if necessary,
downscaled by a factor of two prior to the first stage.
The user can optionally select one of the other two
scaling modes. To apply unconditional block floating-
point scaling, the CoreFFT configuration parameter scale
needs to be set to 1. To apply input data scaling, the
scale configuration parameter has to take the default
value of 0, and the FFT input data has to contain the
proper number of guard bits. Then the conditional block
floating-point scaling will take no effect.
CoreFFT Generator Parameters
CoreFFT generates RTL code for a few selectable FFT
cores that vary depending on parameters set by the user
when generating the module. The core generator
supports the variations specified in Table 5 .
Name
inv
Description
Forward/inverse FFT
Recommended Selection
0 (FFT) / 1 (IFFT)
scale
Unconditional block floating-point scaling 0 (conditional block floating-point) / 1 (unconditional block floating-point)
points
bits
fpga_family
lang
Transform size
FFT engine bit width
FPGA family
RTL code language
32 , 64 , 128 , 256 , 512 , 1024 , 2048
8 to 16
ax (Axcelerator, RTAX-S), apa (ProASIC PLUS ), pa3 ( ProASIC3)
vhdl , verilog
v4.0
7
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